Posted May 27, 2013
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ASIC Design Engineer - [REF ASIP02]
MIPEX, an IC design center based in Cairo, is seeking exceptional team members who are eager to work on cutting edge projects utilizing the latest technologies and tools.
The following position is currently required: ASIC Design Engineer - [REF ASIP02] Qualifications: - B.Sc. in Electronics Engineering. - 0-3 Years of experience in VLSI Digital Design/Verification. - Strong knowledge of Verilog RTL design/simulation. - Knowledge of ASIC/FPGA design flows including simulators, functional and code coverage tools, RTL Synthesis tools, timing analysis and related tools. - Familiarity with System Verilog, RTL/gate verification techniques is a plus. - Oral and written fluency in English. - Knowledge of Unix/Linux operating system is a plus. - Knowledge of shell scripting/programming languages is a plus. Responsibilities: - Develop thorough understanding of system level design specifications. - RTL coding/synthesis of digital part of Mixed Signal IPs. - Develop behavioral models for the analog parts of Mixed Signal IPs. - Develop advanced verification environment and test-bench components. - Working with the mixed signal team on the co-simulation and verification of IP's. Interested candidates should send their resumes to [email protected] with the corresponding reference code appearing in the subject line of the email. |