Posted Feb 6, 2014

Senior Developer Engineer 

The Vista Modeling Team of ESD is pleased to announce seeking a motivated Senior Developer Engineer to work as a contractor with the following qualifications:

Job Description

1. Develop software Models for Hardware devices. 
   
2. Create SystemC TLM 2.0 models that can be used to create Virtual Platforms.
   
3. Integrate SystemC models to build System Platform. 
   
4. Build Virtual Platform for Hardware designs on the System Level.
   
5. Test the models using existing processor models (Generic/ARM-based Fast Models).
   
6. Verify the models functionality versus behavior model and/or RTL using SystemC and UVM/SystemVerilog.
   
7. Apply unit testing/debug.
   
8. Execute the implementation/test plan.
   
9. Modeling will be using Vista tools.
   
10. The model list will be defined and prioritized based on customer requests (targeting ARM and PPC Multi-Core architectures) [examples are: DMA, TIMERs, SSP, UART, Flashs, Caches, etc.].
    
11. Write professional Functional Specs and Design Documents.
    

Job Qualifications

1. Bachelor, Master, or Ph.D. degree in Computer or Electrical Engineering [with minimum Very Good with honors degree].
   
2. Strong experience in C/C++ Programming.
   
3. Have the basic knowledge of digital circuits and digital design/systems.
   
4. Having good background in programming using SystemC is a plus.
   
5. Experience in Embedded Software Development is a plus.
   
6. Have good experience in using Linux/Unix OS.
   
7. Have good experience in scripting/scripting languages such as Make/Tcl/Perl.
   
8. Position requires well developed written and oral communication skills. 
   
9. Being able to work with tight deadlines and meet schedules. 
   
10. Self-motivated/self-learning capabilities.
    
11. Excellent command of English. 
    

If you are interested, please send the CVs to me at [email protected].