Posted Jun 20, 2014

DIGITAL PHYSICAL DESIGNER

We are Expanding

Symmid -based in Kuala Lumpur Malaysia - is growing, with new projects coming in, and there are unlimited opportunities in a growing company. They offer an excellent work place – it is a truly and multi-national environment, with people from all continents. Job satisfaction is very high, and you would have the opportunity to work on many aspects of chip design.

Job Description

• Power planning , optimization , power grid and signal routing considering timing constraints
  
• Design floor planning , analogue and memory macro placement
  
• Place and route including timing closure
  
• Extraction of layout parasitics and SPEF / SDF generation
  
• Signal integrity tests
  
• Post-synthesis static timing analysis ( STA ) and post-layout STA
  
• Physical verification ( DRC , ERC, LVS, ANTENNA rules)
  
• Writing, running, optimization of scripts for above tasks
  
• Implement and monitor Quality Assurance/Quality Control standards based on corporate guidelines in a project setting
  
• Have done multiple tapeouts and proven record of designing complex ICs in state of the art CMOS process technologies and has successfully placed products into volume production, preferably multiple times.
  
• Train/mentor new employees
  

Requirements

• At least 3-5 years professional experience in microelectronics physical implementation.
  
• Self-motivated
  
• Good verbal and writing communication skills
  
• Fabrication process variation impacts and performance
  
• Experience in CMOS analog design and knowledge of industry-standard design and simulation tools
  
• Experience in low-power design techniques
  
• Experience with the following tools:
  - Mandatory: Cadence RTL Compiler , SOC-Encounter / EDIS , ETS , EPS
  - CLP , QRC
  - Desirable: Mentor Calibre/Assura

**If interested Contact me via [email protected], stating your Name & contact, Years of Experience, Lowest Technology Node you have worked on & Availability time. **