2013 VLSI ACADEMY ASIC DESIGN WORKSHOP
Eng. Amr Lotfy
Jun 23 - Jul 6 2013
Time: 9:30 am -1:30 pm
Lab 5, Third Floor, Electrical Department Building
Faculty of Engineering - Alexandria University
Amr Lotfy received the B.Sc. degree in electrical engineering from Alexandria University, in 2008 and the M.S degree in Microelectronic Systems Design from Nile University in 2011. From 2009 to 2010, he was with Intel Architecture Group (IAG), Hillsboro OR, USA, working on the design of high performance digital phase locked loops. Currently he is a research scientist and consultant in the wireless sensors group at Intel Egypt. His research is focusing on high performance clock generation circuits for microprocessors and high speed links. Amr is a technical reviewer for the IEEE TCAS-I and TVLSI Journals.
Modern digital VLSI chips, like microprocessors, contain billions of transistors and thousands of logic gates. The design of such chips is quite complex and require many phases of testing and verification. This workshop provides a hands-on illustration of taking an ASIC from RTL to tape-out