digital ic design flow using xilinx tools
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Organized by VLSI Egypt & sponsored by Silminds
Location Faculty of Electronic Engineering, Menoufia University Date Wednesday, April 24th, 2013 9:00 am - 5:00 pm Instructor Eng. Ramy Raafat is a Senior Digital Design Engineer at SilMinds, Cairo, Egypt. He received his B.Cs from faculty of engineering, Cairo University in 2006. He has more than six years of experience in Digital FPGA design flow. His graduation project (CUSPARC embedded processor) won the first prize in EED—2006. He has a four published papers in designing the arithmetic block |
