vhdl course

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Instructor:  Khalid Essam
Date: May, 2 2014
Course Contents

  • Introduction
  • Basic Definitions
  • Basic Constructs, FPGA
  • FPGA Design Flow
  • Conceptual, Structural, and Behavioral Implementation
  • Basic Language Constructs of VHDL
  • Test Benches
  • When-Else
  • Selected Signal Assignment
  • Sequential Statements, Process and Variables
  • IF Statement
  • Case Statements and Loops
  • EDA Tools
  • Design Optimization - Operator Sharing
  • Design Optimization - Function Sharing
  • Design Layout Optimization
  • Sequential Circuit Design

lecture 0
introduction
(download slides)

lecture 1
Basic definitions
(download slides)

lecture 2
basic constructs,fpga
(download slides)

lecture 3
fpga design flow
(download slides)

lecture 4
conceptual, structural, and behavioral implementation
(download slides)

lecture 5
basic language constructs of
VHDL
(download slides)

lecture 6
basic language constructs of VHDL
(download slides)

lecture 7
test benches
(download slides)

lecture 8
when-else
(download slides)


lecture 9
selected signal assignment
(download slides)

lecture 10
sequential statements, process and variables
(download slides)

lecture 11
if statement

(download slides)

lecture 12
case statements and loops
(download slides)


lecture 13
EDA tools
(download slides)

lecture 14
eda tools
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lecture 15
eda tools
(download slides)

lecture 16
design optimization-operator sharing
(download slides)

lecture 17
design optimization-function sharing
(download slides)

lecture 18
design layout optimization
(download slides)

lecture 19
sequential circuit design
(download slides)

lecture 20
sequential circuit design
(download slides)